Читать книгу Handbook of Microwave Component Measurements - Joel P. Dunsmore - Страница 111

The final hardware portion of the VNA block diagram is the IF processing chain. The VNA receiver converts the RF signal to a first IF frequency, which is further converted and detected in the IF processing path. In older analyzers, such as the HP‐8510, this consisted of a synchronous analog second‐converter that produced two DC outputs proportional the real and imaginary portions of the RF voltage at the receiver input. These DC voltages were measured with DC analog‐to‐digital converters (ADCs) that produced a digital representation of the real and imaginary values. More modern IF structures such as in the HP‐8753 or HP‐8720 used a second stage of IF down‐conversion to bring the IF signal down to a frequency where an AC ADC could directly sample the waveform. The final IF frequency was set by the sampling rate of the ADC.