Читать книгу Microprocessor 4 - Philippe Darche - Страница 39

1.2.5. Summary on addressing

Оглавление

Addressing modes have evolved to meet needs in the software industry to improve efficiency of programs and facilitate implementing functionalities of high- level languages as their control structures. It is useful to class addressing modes depending on their content, code or data. Simple code addressing modes are Program Counter (PC)-relative absolute addressings and indirect register addressings. Sequential execution by nop instruction can be seen as an addressing mode. Sample data addressing modes are immediate, (direct) register, implicit and base plus offset modes. Mixed (code/data) modes are direct absolute and indexed, base plus index modes with or without offset (base plus index plus offset), scaled indexed modes, register indirect modes, indirect register modes with auto-increment, indirect memory and PC-relative modes.

Making the programmer accessible to registers that are not conventional, such as PC and SP, makes it possible to enrich addressing modes. Thus, some modes can be implemented using others, such as, for example, absolute and relative modes with respectively indirect and indexed modes.

The trend has been towards multiplying addressing modes, making it possible to adapt to complex data structures such as those of high-level languages or application domains such as digital signal processing with its operations such as convolution or correlation. This wealth of modes facilitates the life of the assembly language programmer and makes it possible for the code to be compact during compilation. The counterpart is the complexity of the CU (Control Unit), one of the defects of the CISC approach (this will be covered in a future book by the author on microprocessors). The number of possibilities of machine codes depends on the number of instructions and associated addressing modes. Therefore, MC6809 had 59 instructions and 1,464 machine codes (Motorola 1981, 1983). A reverse tendency was that of reduced instruction set architectures (RISC, this will be covered in a future book by the author on microprocessors).

Microprocessor 4

Подняться наверх