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This edition first published 2022

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Library of Congress Cataloging-in-Publication Data

Names: Tripathi, Suman Lata, author. | Saxena, Sobhit, author. | Sinha, Sanjeet Kumar, author. | Patel, Govind Singh, author.

Title: Digital VLSI design and simulation with Verilog / Suman Lata Tripathi, Sobhit Saxena, Sanjeet Kumar Sinha, Govind Singh Patel.

Description: Hoboken, NJ : John Wiley & Sons, 2022. | Includes bibliographical references and index.

Subjects: LCSH: Integrated circuits--Very large scale integration--Design and construction. | Verilog (Computer hardware description language)

Classification: LCC TK7874.75 .T75 2022 (print) | LCC TK7874.75 (ebook) | DDC 621.39/5028553--dc23

LC record available at https://lccn.loc.gov/2021020790 LC ebook record available at https://lccn.loc.gov/2021020791

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Digital VLSI Design and Simulation with Verilog

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