Читать книгу Origin of Power Converters - Tsai-Fu Wu - Страница 20

In last section, many well‐known PWM converters were introduced, but many questions were also brought up. A general question is that how to develop the converters systematically. In this section, several typical approaches are described briefly for later discussion.

From the converters shown in Figures 1.7 and 1.8a, one can observe that the active and passive switches have a common node. Thus, a switching cell concept was introduced to explain the configurations of the converters. There are two types of switching cells, P cell and N cell, as shown in Figure 1.16, and each has two terminals for connecting to source or output and one current terminal for connecting to inductor to form a PWM converter. For examples, buck converter can be derived from P cell, while boost converter can be derived from N cell. This is a kind of intuitive approach with induction but without manipulation on the converters. In fact, with a little bit of manipulation by relocating capacitor C₁ in the sepic and Zeta converters shown in Figure 1.8b and c from the forward path to the return path, a P cell and an N cell can be identified, and the converters can be derived accordingly. Typically, this approach is used to explain the existing converter configurations, but it is hard to develop new converters. It is based on a cell level.

Similarly, based on observation and induction, the converters shown in Figures 1.7 and 1.8 can be explained with two canonical switching cells, namely, Tee canonical cell and Pi canonical cell, as shown in Figure 1.17. By exhaustively enumerating all of possible combinations of Z_in, Z_out, and Z_x, and including LC network, source, and load, the converters shown in Figures 1.7 and 1.8 can be derived. Additionally, the converters with extra LC filters and inverse versions of the converters can be derived. Figure 1.18 shows the buck and boost converters and their inverse versions, in which the input‐to‐output transfer ratios shown in the bottom of the converters are corresponding to continuous conduction mode, and D is the duty ratio of the active switch. Moreover, the converters with the same higher step‐up voltage transfer ratio but with different circuit configurations, as shown in Figure 1.19, can be developed. Although this approach can derive new PWM converters and is straightforward, it is still tedious and lacks of mechanism to explain the converters with identical transfer ratio but with different configurations. Again, it is based on a cell level.

Figure 1.16 (a) P cell and (b) N cell.

Figure 1.17 (a) Tee canonical cell and (b) Pi canonical cell.

Figure 1.18 (a) Buck and inverse buck and (b) boost and inverse boost.

Figure 1.19 With the same input‐to‐output transfer ratio of (2D − 1)/(1 − D) but with different configurations (a) and (b).

Based on a cell level, another approach to developing new converters with higher step‐up and step‐down voltage ratios by introducing switched‐capacitor or switched‐inductor cells to the PWM converters shown in Figures 1.7 and 1.8 was proposed. Typical switched‐capacitor and switched‐inductor cells are shown in Figure 1.20, and their derived converters have been shown in Figure 1.10. Applications of this approach are quite limited, and the chance of deriving new converters is highly depending on experience. Otherwise, it might need many trial and errors. When inserting a cell into a PWM converter, one has to use volt‐second balance principle to verify if the converter is valid. This approach still needs a lot of ground work to derive a valid converter.

Another synthesis approach based on a converter cell concept, 1L and 2L1C, was proposed. The synthesis procedure is supported with graph theory and matrix representation and based on a prescribed set of properties or constraints as criteria to extract a converter from all of the possible combinations, reducing the number of trial and errors. A structure of PWM DC–DC converters included in the synthesis procedure is depicted in Figure 1.21, and possible positions of inserting an inductor into a second‐order PWM converter are shown in Figure 1.22. Typical converter properties include number of capacitors and inductors, number of active–passive switches, DC voltage conversion ratio, continuous input and/or output current, possible coupling of inductors, etc. This approach seems general and has a broad vision in synthesizing converters, but it needs a lot of efforts or even trial and errors in selecting a valid converter when considering many properties simultaneously. For the main purpose of deriving a converter, maybe, we have to consider the static performance, such as input‐to‐output voltage transfer ratio and continuous inductor current, first, and if users would like to know more about the dynamics of the converter, they can analyze them further.

Figure 1.20 (a) Switched‐capacitor and (b) switched‐inductor cells.

Figure 1.21 Structure of PWM converters used in the derivation procedure.

Figure 1.22 Possible positions of the inductor in a second‐order PWM converter based on 1L converter cell.

In the above discussed approaches, the converters are derived or synthesized based on cell or component levels. They select a proper converter configuration and add certain cell or component to the converter to form a new converter topology. Essentially, they exhaustively enumerate all of possible combinations and extract converters based on certain constraints or properties. Valid converters are verified with the volt‐second balance principle. Applications of these approaches to developing new converters are quite limited because the chance of obtaining a valid converter is depending highly on experience. Is it possible to start from valid converters and with certain manipulation to develop new converters? To answer this question, several viable approaches are briefly discussed.

The three well‐known valid PWM converters, buck, boost, and buck‐boost, are shown in Figure 1.7. With a synchronous switch technique, the buck‐boost converter can be derived from buck and boost converters in cascade connection. The derivation procedure is illustrated in Figure 1.23, in which the buck and boost converters in cascade connection is shown in Figure 1.23a. Without considering ripple current, it can be proved that capacitor C₁ can be eliminated, and inductors L₁ and L₂ are just connected in series to become L₁₂, as shown in Figure 1.23b. If switches S₁ and S₂ are synchronized and have identical duty ratio, the active–passive switch pairs, S₁&D₁ and S₂&D₂, can be replaced with two single‐pole double‐throw (SPDT) switches, as also shown in Figure 1.23b, in which node “A” corresponds to an active switch and node “B” is to a passive switch. Thus, the circuit shown in Figure 1.23b can be simplified to that shown in Figure 1.23c, and the two switch pairs can be combined to S₁₂. Replacing the switch pair with an active switch and a passive one yields the buck‐boost converter shown in Figure 1.23d. Note that at the output of Figure 1.23b, the positive polarity is located at the upper node, while that in Figure 1.23c and d, the positive polarity is in the lower node. How to determine the polarity is not straightforward. And it usually needs several words to explain the polarity transition. Similarly, the Ćuk converter that can be proved to be a cascade connection of boost and buck converter can be also derived with the same procedure. Again, the change of output polarity needs extra explanation, and it is not so obvious and convincible.

Figure 1.23 Evolution of the buck‐boost converter from the buck and boost converters with a synchronous switch technique.

The derivation procedure based on the synchronous switch technique is so far only applied to two switch pairs, because its combination of switch pairs, location of inductor/capacitor, and determination of output voltage polarity are not straightforward. This approach is essentially based on a preliminary observation of converter operation and configuration, but it lacks of principle or mechanism in decoupling and decoding PWM converters. Thus, it cannot be extended to derive other PWM converters, such as the sepic and Zeta converters shown in Figure 1.8b and c.

Based on the synchronous switch concept, the graft switch technique (GST) was proposed. Instead of starting from converter manipulation, the GST starts to deal with how to graft two switches operated in unison or synchronously and with at least a common node, from which four types of grafted switches are developed, as shown in Figure 1.24. They are T‐type, inverse T‐type, Π‐type, and inverse Π‐type grafted switches, which can be used to integrate the active switches in the converters. An illustration example in deriving the buck‐boost converter is shown in Figure 1.25. Again, the buck and boost converters in cascade connection shown in Figure 1.23a is still adopted. After simplifying the L₁C₁L₂ filter, we can obtain a circuit shown in Figure 1.25a. By exchanging the connection of source V_i and switch S₁, we can create a common D–S node for switches S₁ and S₂, as shown in Figure 1.25b. Then, we replace S₁ and S₂ with a Π‐type grafted switch S₁₂, as shown in Figure 1.25c. Since the currents through switches S₁ and S₂ are identical when they are operated in unison, the two circulating‐current diodes D_F1 and D_F2 can be removed from the Π‐type grafted switch, and the circuit becomes the one shown in Figure 1.25d. Note that detailed explanation for the diode degeneration will be presented in later chapter. From the circuit shown in Figure 1.25d, we can recognize that diodes D₁ and D₂ are just in series connection, and they can be replaced with a single one D₁₂, as shown in Figure 1.25e. By redrawing the circuit, we can have the one shown in Figure 1.25f. Since switches S₁₂ and diode D₁₂ can be moved from the return path to the forward path without changing its operational principle, we can have a well‐known form of the buck‐boost converter shown in Figure 1.25g. Note that the output voltage polarity is naturally different from that of the input through the switch integration, without the need of extra words to explain that.

Figure 1.24 Four types of grafted switches: (a) T‐type, (b) inverse T‐type, (c) Π‐type, and (d) inverse Π‐type.

Note that for converter applications, the buck and the boost converters in cascade and with a simplified filter shown in Figure 1.25a are also feasible for their lower voltage stresses imposed on switches S₁&S₂ and diodes D₁&D₂, and V_i and V_o have a common voltage polarity, even though the cascaded converter requires two pairs of active–passive switches and more switch drivers.

Figure 1.25 Illustration of the buck‐boost converter derived with the graft switch technique.

The GST starts from dealing with two active switches, but in fact, it can be extended to any number of switches operated synchronously and with at least a common node. Moreover, with a transfer‐ratio decoding process, the GST can be applied to derive other PWM converters, including the converters shown in Figures 1.8–1.13.

Figure 1.26 Derivation of the buck‐boost converter with the converter layer technique.

Based on a transfer‐ratio decoding process, the converter layer technique (CLT) was proposed. With the CLT, the buck‐boost converter can be derived readily, as shown in Figure 1.26. Figure 1.26a shows a buck converter with its input‐to‐output voltage transfer ratio D. With a positive unity output feedback to the input, the input‐to‐output voltage transfer ratio can be determined as V_o/V_i = D/(1 − D), as shown in Figure 1.26b, which can be realized with the buck converter and a unity output feedback shown in Figure 1.26c. Redrawing the circuit in a well‐known form can be recognized as a buck‐boost converter, as shown in Figure 1.26d.

The GST can be equivalent to a converter feedforward approach, while the CLT is a feedback scheme. With these two techniques together, many new PWM converters can be derived. When further associated with the transfer‐ratio decoding process, more converters can be synthesized, and readers can understand the converter evolution mechanism or principle comprehensively.