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Foreword

Ahmed JERRAYA

Cyber Physical Systems Programs, CEATech, Grenoble, France

Multi-core and multi-processor SoC (MPSoC) concepts started in the late 1990s, mainly to mitigate the complexity of application-specific integrated circuits (ASICs) and to bring some flexibility. The integration of instruction-set processors into ASIC design aimed both to structure the architecture and to allow for programmability. The concept was adopted for general-purpose CPU and GPU in the second phase. Among the pioneers of MPSoC design, we can list the MPA architecture from ST that used eight specific cores to implement MPEG4 in 1998. This evolved 10 years later to give rise to MPPA, the Kalray’s general-purpose MPSoC architecture. Another pioneer is the emotion engine from Sony that used five cores (two DSP and three RISC) to build the application processor for the PlayStation (PS2). This also evolved and later converged to bring the CELL architecture (developed jointly by Sony, IBM and Toshiba) in 2005. In 2000, Lucent announced Daytona (quad SPARC V8), and in 2001, Philips designed the famous Viper architecture that combined a MIPS architecture and a DSP (Trimedia). In 2004, TI introduced the OMAP architecture that combined an ARM and a DSP. Using MPSoC to build specific architectures is continuing, and almost every SoC produced today is a multi (or many) core architecture. An important evolution took place in 2005 with the ARM MPCore, the first general-purpose quad core. This was followed by several commercial, general-purpose multi-cores, including Intel Core Duo Pentium, AMD Opteron, Niagra Spark, the Cell processor (8 Cell cores + PowerPC, ring network).

MPSoC started a new computing era, but brought a twofold challenge: building multi-core HW that can be used easily by SW designers, and building distributed SW that fully exploits HW capabilities. To deal with these challenges, the design communities from Academia and Industry began a series of conferences and workshops to rethink classical distributed computing. The study of new methods, models and tools to deal with these new distributed HW and SW architectures generated new concepts, such as the interconnect architectures called network-on-chip (NoC). The MPSoC Forum, created in 2001, was the first interdisciplinary forum that brought together the leading thinkers from the different fields to design multi-core and multi-processor SoC. Over the last 20 years, MPSoC has been a unique opportunity for me to meet so many of the world’s top researchers and to communicate with them in person, in addition to enjoying the high-quality conference programs. The confluence of academic and industrial perspectives, and hardware and software, makes MPSoC not “yet another conference”. I have learned how emerging SW and HW design technologies and architectures can benefit from advanced semiconductor manufacturing technologies to build energy-efficient multi-core architectures that can serve advanced computing (image, vision and cloud) and distributed networked systems. This book, in two volumes (Architectures and Applications), was published to celebrate the 20th anniversary of MPSoC with outstanding contributions from previous MPSoC events.

This first volume on architectures covers the key components of MPSoC: processors, memory, interconnect and interfaces.