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1 Chapter 1Figure 1.1 The above schematic shows the sun-earth geometry portraying distance ...Figure 1.2 The above figure portrays different radiations occurring from the sun...Figure 1.3 Schematic to show atomic positions in diamond-type cubic lattice.Figure 1.4 Figure showing the doping of two types of foreign atoms of B (p-type)...Figure 1.5 Two semiconductor blocks of p-type and n-type before the formation of...Figure 1.6 Space charge region formed in between the joining region of p-type an...Figure 1.7 Current-voltage (I-V) characteristics of a semiconductor p-n junction...Figure 1.8 The two biasing regimes of a diode, (a) reverse (b) forward, are show...Figure 1.9 The above figure (a) displays band diagram of an abrupt junction in s...Figure 1.10 Approximation of foreign atom doping profiles in semiconductor formi...Figure 1.11 The schematic shows the electric field distribution and the width of...Figure 1.12 Schematic representations of barrier width and corresponding band en...Figure 1.13 Schematic shows an arbitrarily profile of dopants when reversed bias...Figure 1.14 Schematic shows diagrammatically the various steps involved in fabri...Figure 1.15 (a) Shows the schematic of (a) monofacial solar cell, (b) bifacial s...Figure 1.16 Fabrication steps involved in the preparation of a monofacial solar ...Figure 1.17 Shows the process flow for fabrication of solar cells to manufacture...Figure 1.18 Schematic shows the electrical contacting of n-type layers with curr...Figure 1.19 Schematic shows the electrical circuit of solar cell with current co...Figure 1.20 Schematic shows the electrical circuit of solar cell with current co...

2 Chapter 2Figure 2.1 A typical solar cell design [2].Figure 2.2 Efficiencies of the different substrate when deposited with CIGS [3].Figure 2.3 Efficiencies obtained for different solar materials for the device st...Figure 2.4 (a) The PCE record for Sb type solar cell of thin-film category. (b) ...Figure 2.5 Levels of energy for different materials used inperovskites solar cel...Figure 2.6 Efficiencies obtained with the passage of year for flexible and norma...

3 Chapter 3Figure 3.1 Types of perovskite solar cell architectures (a) Planer structure (b)...Figure 3.2 Charge transfer mechanism of (a) planner perovskite structure and (b)...Figure 3.3 Energy-level diagrams of a typical perovskite solar cell.Figure 3.4 Scalable manufacturing techniques for PSCs.Figure 3.5 Methods of spin coating (a) one-step deposition and (b) two-step depo...Figure 3.6 Photographic image of Roll to Roll manufacturing process [78].Figure 3.7 Slot-die coating method.Figure 3.8 Screen printing method.Figure 3.9 Inkjet printing (a) continuous (b) drop-on-demand.Figure 3.10 Doctor blade coating.

4 Chapter 4Figure 4.1 Single-diode model.Figure 4.2 Double-diode model.Figure 4.3 Three-diode model.Figure 4.4 Convergence curve for SDM (STM6 40-36 model).Figure 4.5 Convergence plot for DDM (JP270M60 model).Figure 4.6 Convergence characteristics for TDM (STP6 120-36 model).

5 Chapter 5Figure 5.1 Global cumulative PV power capacity (GW) from 2008 to 2018.Figure 5.2 Power and control circuit of the PV generation system.Figure 5.3 In a large PV system develops the PV cell to the panel.Figure 5.4 A PV cell physical electron-hole structure [19].Figure 5.5 Two PV array forming bipolar consisting of two monopolies PV array.Figure 5.6 Bypass and blocking diodes based a PV circuit.Figure 5.7 Electrical power SDPVC circuit (a) real-time model, (b) and (c) two s...Figure 5.8 The circuit diagram of the DDPVC.Figure 5.9 PV system based central, string, multistring, and ac-module configura...Figure 5.10 I-V and P-V curve for a PV based the MPP.Figure 5.11 P-V curves, various operating conditions.Figure 5.12 The power circuit structure of a PV scheme incorporating MPPT and ad...Figure 5.13 Hill-climbing P&O-MPPT scheme flow diagram [12].Figure 5.14 Flowchart of InC.-MPPT scheme [12].Figure 5.15 Stand-alone PV system, multilevel inverter output (a) voltage and cu...

6 Chapter 6Figure 6.1 Comparison of Energy Density of Lithium Cells and Other Types of Cell...Figure 6.2 Battery Management System (BMS) Block Diagram.Figure 6.3 The Suggested System Block Diagram.Figure 6.4 The Employed Battery Equivalent Circuit Model [24].Figure 6.5 The VL30P Cell Charge/Discharge Current Acquired with a 5-Bit Resolut...Figure 6.6 The SoC-OCV Reference Relation.Figure 6.7 The VL30P Cell Voltage Acquired with a 2.8-Bit Resolution Non-uniform...Figure 6.8 The Li-Ion Cell SoH Curve Respectively Estimated by the Reference Est...

7 Chapter 7Figure 7.1 Types of PQ Disturbances.Figure 7.2 Sources of PQ Disturbances [19].Figure 7.3 Facilities Affected by PQ Disturbances [23].Figure 7.4 The system Block Diagram.Figure 7.5 The PQ instances for Pure Signal, Sag, Swell and Interruption.Figure 7.6 Sampling operation in the time and frequency domains [35].Figure 7.7 The sequence of a activity windowing.Figure 7.8 The Features Extraction Principle.Figure 7.9 The PQ signals instances digitized with a 4–Bit resolution EDADC for ...

8 Chapter 8Figure 8.1 Activity of Solid Oxide Fuel Cell.Figure 8.2 Crystal structure of ABO3 perovskite, A2BO4 RP phase, (A = green sphe...Figure 8.3 Simultaneous thermo-gravimetric (TG) and differential scanning calori...Figure 8.4 Rietveld refinement of XRD data for all samples, symbols show experim...Figure 8.5 Absorption spectra of all samples obtained at room temperature (inset...Figure 8.6 (a) Tauc plot generated using Eq. (8.12) of sample SSB16 for both dir...Figure 8.7 Illustration of (a) Dielectric constant, and (b) Dissipation factor, ...Figure 8.8 Room temperature XRD pattern of La-doped Sr2SnO4 samples.Figure 8.9 (a) Rietveld refinement of XRD data for all samples, symbols show exp...Figure 8.10 Room temperature absorption spectra of all samples (the enlarged vie...Figure 8.11 (a) Tauc plot of sample generated using Eq. (8.12) for sample SSL2, ...Figure 8.12 (a) Illustration of ac conductivity in terms of frequency at differe...

9 Chapter 9Figure 9.1 Generic structure of a PV system.Figure 9.2 Equivalent circuit.Figure 9.3 Ideal solar cell.Figure 9.4 Flow diagram for panel modelling.Figure 9.5 IV characteristics of the panel.Figure 9.6 PV characteristics of the panel.Figure 9.7 Improvement in IV characteristics.Figure 9.8 Improvement in PV characteristics.Figure 9.9 IV curve for the combined model.Figure 9.10 PV curve for the combined model.Figure 9.11 PV characteristics for varying irradiation.Figure 9.12 IV characteristics for varying irradiation.Figure 9.13 PV characteristics for varying temperature.Figure 9.14 IV characteristics for varying temperature.

10 Chapter 10Figure 10.1 Operation of Solar Cell.Figure 10.2 Equivalent circuit of solar cell: (a) One-diode model (b) Two-diode ...Figure 10.3 Typical I-V characteristics of a solar PV module.Figure 10.4 Typical P-V curve of a solar PV module.Figure 10.5 Solar Panel I-V and Power Curve.Figure 10.6 Different Irradiance Levels on a Solar Panel.Figure 10.7 Temperature Effect on Solar Panel Power and I-V Curves.Figure 10.8 Modeling of PV Panel.Figure 10.9 Output voltage, current and power of a PV panel.Figure 10.10 PV panel interfaced with boost converter.Figure 10.11 Topologies of power converters.Figure 10.12 Equivalent circuit of boost converter.Figure 10.13 Steady state voltage and current waveform of boost converter.Figure 10.14 Equivalent circuit of buck-boost converter.Figure 10.15 Steady-state voltage and current waveform of buck-boost converter.Figure 10.16 Classification of DC link inverters.Figure 10.17 Block diagram of BCMLI.Figure 10.18 Equivalent circuit of seven-level BCMLI.Figure 10.19 Mode 1 operations: (a) At t = TON1 (b) At t = TOFF1.Figure 10.20 Voltage across Sb1 and inductor current at mode 1 operation.Figure 10.21 Mode 2 operations: (a) At t = TON2 (b) At t = TOFF2.Figure 10.22 Voltage across Sb1 and Sb2 and inductor current at mode 2 operation...Figure 10.23 Mode 3 operations: (a) At t = TON3 (b) At t = TOFF3.Figure 10.24 Voltage across Sb1, Sb2 and Sb3 and inductor current at mode 3 oper...Figure 10.25 Typical output voltage waveform of seven-level BCMLI.Figure 10.26 General structure of BCDCLHBI.Figure 10.27 Equivalent structure of seven-level BCDCLHBI With Battery.Figure 10.28 Equivalent structure of seven-level BCDCLHBI with Solar PV.Figure 10.29 Operation of BCDCLHBI: (a) Mode 1 operation at t = TON1 (b) Mode 1 ...Figure 10.30 Inductor current waveform at t = TON1 and t = TOFF1.Figure 10.31 Operation of BCDCLHBI: (a) Mode 2 operation at t = TON1 (b) Mode 2 ...Figure 10.32 Inductor current waveform at t = TON2 and t = TOFF2.Figure 10.33 Operation of BCDCLHBI: (a) Mode 3 operation at t = TON3 (b) Mode 3 ...Figure 10.34 Inductor current waveform at t = TON3 and t = TOFF3.Figure 10.35 Typical voltage waveform of seven-level BCDCLHBI.Figure 10.36 Block diagram of single-phase seven-level BCDCLHBI.Figure 10.37 Hardware realization circuit of single phase seven-level BCDCLHBI.Figure 10.38 Gate Driver Circuit Specifications of single-phase BCDCLHBI systems...

11 Chapter 11Figure 11.1 Modified double-diode model.Figure 11.2 Schematic diagram of Harris hawks optimization phases [18].Figure 11.3 Kruskal Wallis test performance for KC200GT model.Figure 11.4 Kruskal Wallis test mean ranks for MSX-60 model.Figure 11.5 Kruskal Wallis test results for CS6K-280M model.Figure 11.6 Convergence Curve for a MDDM (Kyocera KC200GT).Figure 11.7 Convergence Curve for a MDDM (Solarex MSX-60).Figure 11.8 Convergence Curve for MDDM (Canadian Solar CS6K-280M).

12 Chapter 12Figure 12.1 Typical applications of suggested topology.Figure 12.2 Proposed step-up converter.Figure 12.3 Equivalent circuit of suggested topology in a) Mode I, b) Mode II, c...Figure 12.4 The key waveforms of suggested structure.Figure 12.5 Voltage conversion ratio of proposed topology versus different duty ...Figure 12.6 The real model of proposed topology considering parasitic components...Figure 12.7 The real and typical real gain of proposed topology.Figure 12.8 Comparison between boosting capability of proposed and [33-36] topol...Figure 12.9 Comparison between proposed structure and [33-36] from viewpoint of:...Figure 12.10 Comparison between ANVS of proposed and [33-36] topologies.Figure 12.11 Output voltage and load current waveforms of proposed topology.Figure 12.12 Voltage and current waveforms of capacitors a) C1, b) Co.Figure 12.13 Voltage and current waveforms of inductors a) L1, b) L2.Figure 12.14 Input current waveform of proposed topology.Figure 12.15 Voltage and current waveforms of semiconductors of suggested struct...

13 Chapter 13Figure 13.1 Configuration of microgrid.Figure 13.2 AC microgrid.Figure 13.3 DC microgrid.Figure 13.4 Classification of microgrid stability.

14 Chapter 14Figure 14.1 Inverter-fed SPMSM system.Figure 14.2 Seven zones in one switching cycle in SVPWM.Figure 14.3 Ripple current variation in one switching cycle in SVPWM.Figure 14.4 Switch combination of eight different voltage vectors and their Thev...Figure 14.5 PMSM speed response (under constant switching frequency PWM [fsw = 2...Figure 14.6 Response of electromagnetic torque (load torque = 25.8 N.m) (under c...Figure 14.7 Three-phase stator currents (under constant switching frequency PWM ...Figure 14.8 VSFPWM control diagram.Figure 14.9 Switching period calculation module.Figure 14.10 Response of electromagnetic torque (Switch over process between con...Figure 14.11 Three-phase stator currents (Switch over process).Figure 14.12 Switching frequency variation.

15 Chapter 15Figure 15.1 Home automation.Figure 15.2 IoT Protocols.

16 Chapter 16Figure 16.1 Active Energy Consumption in Covenant University from 2014 to 2018.Figure 16.2 Building envelope of Cafeteria 1.Figure 16.3 Energy end-use Pattern in Cafeteria 1.Figure 16.4 Results of Energy Audit in Cafeteria 1.Figure 16.5 Building envelope of Mechanical Engineering Department building.Figure 16.6 Energy end-use of the Mechanical Engineering Department building.Figure 16.7 Energy audit data of the Mechanical Engineering Department building.Figure 16.8 Building envelope of the University Library.Figure 16.9 Energy end-use of the University Library.Figure 16.10 Energy audit data of the University Library.Figure 16.11 Building envelope of Covenant University Health Center.Figure 16.12 Energy end-use of the Health Center.Figure 16.13 Energy audit data of the University Health Center.Figure 16.14 Building envelope of Daniel Hall.Figure 16.15 Energy end-use of Daniel Hall.Figure 16.16 Energy audit data of the Daniel Hall.Figure 16.17 Comparison of energy use among selected buildings.Figure 16.18 CO2 Emissions Monthly for five years to the Corresponding Active En...

17 Chapter 17Figure 17.1 The role of solar-based inverters in a typical micro-grid.Figure 17.2 Suggested basic structure.Figure 17.3 Operating states of suggested 9-level inverter.Figure 17.4 Proposed extended structure.Figure 17.5 Comparing results.Figure 17.6 Nearest level modulation technique and switching pulses.Figure 17.7 The load voltage and current waveforms in (a) P1, (b) P2, (c) P3.Figure 17.8 Dynamic response of suggested topology (P3) during load step-change.Figure 17.9 (a) Voltage and (b) current waveform of switches of suggested struct...Figure 17.10 Efficiency Curve of suggested topology for different load values.

18 Chapter 18Figure 18.1 DFIG Converter System.Figure 18.2 Three-Phase SC Fault of DFIG.Figure 18.3 Characteristics of DFIG with DCC at transient and post-transient con...Figure 18.4. Characteristics of DFIG with DCC at wind speed variations. Time (se...Figure 18.5 Block diagram of DCC with DFIG.Figure 18.6 DFIG Control Scheme.Figure 18.7 DFIG with Conventional controller.Figure 18.8 Current control loop of the generator.Figure 18.9 Cascade control scheme of the generator.Figure 18.10 DFIG- GST with PI controller.Figure 18.11 DFIG with wind speed variations.Figure 18.12 Characteristics of DFIG with conventional, PI and resonant controll...

19 Chapter 19Figure 19.1 Schema of a Microgrid.Figure 19.2 (a) Conventional boost [23] (b) quadratic boost [23], (c) SEPIC [24]...Figure 19.3 The suggested dual-switch step-up topology.Figure 19.4 The waveform of semiconductors, capacitors and inductors of suggeste...Figure 19.5 Proposed converter in Mode I (CCM) and Mode I (DCM).Figure 19.6 Proposed converter in Mode II (CCM) and Mode II (DCM).Figure 19.7 Switches and inductors waveform of proposed converter during DCM.Figure 19.8 Proposed converter in Mode III (DCM).Figure 19.9 Proposed converter in Mode IV (DCM).Figure 19.10 Proposed converter in Mode V (DCM).Figure 19.11 Non-Ideal topology of the proposed converter.Figure 19.12 Real and ideal gain curves of suggested configuration.Figure 19.14 (a) Gain (MCCM). (b) Gain for each component (MCCM/NT). (c) Gain fo...Figure 19.15 The ANSV of suggested topology versus duty cycle.Figure 19.16 Output voltage of proposed converter.Figure 19.17 Voltage stresses of S1 and S2.Figure 19.18 Voltage stresses of the diodes.Figure 19.19 Voltage of C1, C2 and C3.Figure 19.20 Load current (Io).Figure 19.21 Current of LX, LY and LZ.Figure 19.22 Voltage of inductors.Figure 19.23 Current of capacitors.

20 Chapter 20Figure 20.1 First suggested basic 13-level configuration.Figure 20.2 Operational modes of suggested basic 13-level configuration.Figure 20.3 Suggested first extended configuration.Figure 20.4 Suggested second basic 17-level configuration.Figure 20.5 Operational modes of second suggested basic (17-level) configuration...Figure 20.6 Second suggested extended configuration.Figure 20.7 The NL switching method applied in proposed 17-level structure.Figure 20.8 The efficiency curve of suggested 13-level configuration versus outp...Figure 20.9 The loss distribution between devices of suggested 13-level configur...Figure 20.10 The efficiency curve of suggested 17-level configuration versus out...Figure 20.11 The loss distribution between devices of suggested 17-level configu...Figure 20.12 Output voltage and current waveforms of suggested 13-level configur...Figure 20.13 Voltage waveform of capacitors in suggested 13-level configuration.Figure 20.14 Dynamic performance of suggested 13-level configuration.Figure 20.15 Voltage waveform of switches in suggested 13-level configuration.Figure 20.16 Voltage waveform of diodes in suggested 13-level configuration.Figure 20.17 Harmonic spectrum of suggested 13-level configuration.Figure 20.18 Output voltage and current waveforms of suggested 17-level configur...Figure 20.19 Voltage waveform of capacitors in suggested 17-level configuration.Figure 20.20 Dynamic operation of suggested 17-level configuration.Figure 20.21 Voltage waveform of switches in suggested 17-level configuration.Figure 20.22 Voltage waveform of diodes in suggested 17-level configuration.Figure 20.23 Harmonic spectrum of suggested 17-level configuration.Figure 20.24 Number of levels (N)Level (a) per number of switches or drivers (NS...