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Strain Engineering in Modern Field Effect Transistors
ОглавлениеKunal Sinha
Dept. of Electronics, Asutosh College, Kolkata, India
Abstract
Generation of thermal strain while fabricating modern nano-scale Metal-Oxide-Semiconductor-Field-Effect-Transistor (MOSFET) devices is inevitable since the standard CMOS fabrication process includes various high and low thermal stages. Different regions and materials of a MOSFET behave differently due to their difference in thermal expansion co-efficient and it leads to the generation of thermal stress within the device. Various researchers have studied the impact of strain on material and device characteristics in the last few decades through theoretical calculations, software simulations and various experiments and found that introduction of controlled strain within the transistor active region can be used to improve device performance. In this chapter, various theoretical, simulation and experimental research works on strain engineering are discussed in brief. Gradual development of this performance-enhancing technique is also included along with some of the latest reports in this field of research in modern devices.
Keywords: Strain, stress, MOSFET, FinFET, silicon-germanium (SiGe)