Читать книгу Multi-Processor System-on-Chip 2 - Liliana Andrade - Страница 16

The first step towards estimating the HW requirements for a typical beyond 3GPP 5th Generation New Radio (5G) algorithm is sizing the span of workloads in terms of throughput and deadlines under which data processing has to finish. To study the matter, we go over the holistic vision and trends of what we expect in 6G, followed by an analysis of the key deployed 5G standard specifications. From the latter, we identify the far corners that stretch the workload requirement space, see how these corners fit into the vision and trends and provide numerical values for HW requirements of a future MPSoC. Finally, throughout the workload analysis, the emerging theme is the required high flexibility, which leads us to pick a vector digital signal processor (vDSP) as a middle ground that provides both flexibility and good data throughput for single instruction, multiple data (SIMD) processing.