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List of Tables

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1 Chapter 1Table 1.1. Processing requirement corners as per standard specificationTable 1.2. Kernel parameters for corner use casesTable 1.3. Selected GFDM implementation variantsTable 1.4. Kernel profile: cycles, memory accesses, and densityTable 1.5. GFDM: required frequency budget and performance on our vDSP

2 Chapter 2Table 2.1. Implementation properties of various coding schemes

3 Chapter 8Table 8.1. A comparison of large FFTs mapped onto a GPU and an FPGATable 8.2. A comparison of the four back-pressure schemes of Figure 8.18Table 8.3. A summary of the StaccatoLab execution model

4 Chapter 10Table 10.1. Retargeting MAPS towards MPSoC platforms

Multi-Processor System-on-Chip 2

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